1. Field of the invention
This invention concerns a photoelectronic switch of a pulse-modulated light system, that is, a photoelectronic switch adapted to project pulse light and conduct the detecting operation by detecting only the photo-reception signal synchronized with the pulse light and, particularly, it relates to a photoelectronic switch which is less sensitive to the effects of external disturbances such as electric noises from power supply lines and pulse light from light sources, for example, fluorescent lamps, or from other photoelectronic switches emitting pulse light of similar periods.
2. Description of the prior art
The photoelectronic switch described above has been adapted to input a photo-reception signal transmitted from a photoreceiving device into an integrating circuit, compare the thus obtained integrated value with a predetermined reference value and output a detection signal only when the former exceeds the reference value for reducing the effect of the external disturbances.
However, reactance elements such as capacitors or coils have usually been required for constituting the integrating circuit. Accordingly, it has been difficult to make the circuit portion of the photoelectronic switch smaller and, particularly, to attain an integrated circuit having a reactance with an extremely small capacitance.
Further, since the time constant of the integrating circuit is determined with resistors and capacitors or with resistors and coils, the time of generating the detection signal has been varied due to the scatterings in the characteristics of the parts and, accordingly, the operation response time of the photoelectronic switch has not been uniform.
In order to overcome the above-mentioned problems, Japanese Patent Laid Open No.Sho 52-820665 discloses a tecnique of counting pulses by utilizing a shift register However, although the tecnique can attain the integrated circuit structure since the integrating circuit can be constituted without using the reactance element, it requires flip-flop circuits by the setting number of countings. Accordingly, it results in additional problem of increase in the number of parts and corresponding increase in the post, as well as loss of the advantage for attaining the integrated circuit structure due to the enlargement of the area for the integrated circuit itself.
In view of the above, the applicant of the present invention has already filed Japanese Patent Application No. Sho 59-262198 for overcoming the foregoing problems.
Explanation will now be made of the photoelectronic switch according to the above Japanese Patent Application.
As shown in FIG. 9, a pulse oscillator 1 for oscillating pulses at a predetermined frequency is connected with a light emitting element drive circuit 3 for driving a light emitting element 2 in this photoelectronic switch. The photo-reception signal generated from the photoreceiving element 4 upon receiving the pulse light irradiated from the light emitting element 2 is amplified in an amplifier circuit 5 and then transmitted to a waveform shaping circuit 60. The photo-reception signal n wave form-shaped in the wave form shaping circuit 60 is transmitted to a latch circuit 7. The latch circuit 7 latches the photoreception signal n transmitted from the wave form shaping circuit 60 in synchronization with the oscillation pulses a from the pulse oscillator 1.
Further, the pulse oscillator 1 is connected with a presettable up/down counter 33 for counting the oscillation pulses a from the pulse oscillator 1. The output signals s, t, u from the counter 33 are transmitted to a primary logic circuit 34. The primary logic circuit 34 transmits output signals v, w to a detection output circuit 8 when the counter 33 counts pulses of more than a predetermined number.
Output signals c, p from the latch circuit 7 and the output signals v, w from the primary logic circuit 34 are transmitted to a secondary logic circuit 39. The secondary logic circuit 39 resets the counter output of the counter 33 if the pulse light received continuously at the photoreceiving element 4 is less than the predetermined number. Further, it presets the counted output of the counter 33 if the number of pulse light not received continuously is less than the predetermined number.
Then, explanations will be made to one embodiment of a specific circuit of the photoelectronic with as described above while referring to FIG. 10. Explanations for the light emitting element drive circuit 3, light emitting element 2, photoreceiving element 4, amplifier circuit 5 and detection output circuit 8 are omitted since they are not required for explanating the operation.
The latch circuit 7 that latches the photo-reception signal n produced from the photoreceiving element 4 upon receiving the pulse light and wave form-shaped in the wave form shaping circuit 60 by the oscillation pulses a from the pulse oscillator 1 is constituted with a D-flip-flop (delayed flip-flop). The presettable up/down counter 33 for counting the oscillation pulses a from the pulse oscillator 1 comprises three D-flip-flops 331, 332, 333 connected in series to constitute a 8-step counter.
The primary logic circuit 34 transmitted with the count output signals s, t, u from the counter 33 comprises a first logic circuit 341, a second logic circuit 342 and a flip-flop 343 transmitted with the output signals from both of the logic circuits 341, 342. As described above, the output signals v, w of the flip-flop 343 are transmitted to the detection output circuit 8(not illustrated) as described above. Further, output signals v, w of the flip-flop 343 are fed back to the presettable up/down counter 33. Accordingly, the counter 33 functions as an up or down counter. That is, it functions as a down counter when the Q output signal v from the flip-flop 343 is at a high(hereinafter referred to as "H") level, while it functions as an up counter if the Q output signal v is at a low(hereinafter referred to as "L") level.
In the primary logic circuit 34, the primary logic circuit 341 comprises a NOR circuit 35 transmitted with the Q output signal from the flip-flop 331 and the Q output signal from the flip-flop 332 and a NAND circuit 36 transmitted with the output signal from the NOR circuit 35 and the Q output signal u from the flip-flop 333. Then, the secondary logic circuit 342 comprises a NOR circuit 37 transmitted with Q output signal s from the flip-flop 331 and the Q output signal t from the flip-flop 332 and a NAND circuit 38 transmitted with the output signal from the NOR circuit 37 and the Q output signal from the flip-flop 333.
In the primary logic circuit 34 having such a constitution, the primary logic circuit 341 outputs a signal at "L" level when all of the Q output signals s, t, u from the flip-flops 331, 332, 333 are at "H" level. While on the other hand, the secondary logic circuit 342 outputs a signal at "L" level in the state where all of the signals s, t, u are at "L" level. Accordingly, the Q output signal v of the flip-flop 343 turns from "L" to "H" level when all of the Q output signals s, t, u are at "H" level. Further, it turns from "H" to "L" level when all of the Q output signals s, t, u of the flip-flops 331, 332, 333 are at "L" level.
While on the other hand, the secondary logic circuit 39 comprises a first NOR circuit 391 and a second NOR circuit 392. The first NOR circuit 391 is transmitted with the output signal o from the latch circuit 7 and the Q output signal w of the flip-flop 343. Then, the output signal r of the first NOR circuit 391 is transmitted to each of the preset terminals(PR) of the flip-flops 331, 332, 333 for the presettable up/down counter 33. Further, the second NOR circuit 392 is transmitted with the Q output signal p of the latch circuit 7 and the Q output signal v of the flip-flop 343. Then, the output signal q of the second NOR circuit 392 is transmitted to each of the clear terminals(CL) of the flip-flops 331, 332 and 333.
The operation of the photoelectronic switch having the circuit of such a constitution will now be described while referring to the operation wave form chart shown in FIGS. 11-14.
At first, the operation of the photoelectronic switch in the state where the photoreceiving element 4 (refer to FIG. 9) does not receive the pulse light is explained as the first case while referring to FIGS. 10 and 11. Alphabetical letters in FIG. 11 correspond to those for the signals in each of the portions of the circuit in FIG. 10.
In the state as described above, no photo-reception signals are generated in the photoreceiving element 4 as shown to the left of n in FIG. 11. Accordingly, the wave form shaping circuit 60 keeps to output signals at "H" level as shown to the left of n in FIG. 11. The flip-flop 343 in the primary logic circuit 34 issues the Q output signal v at "L" level and the Q output signal w at "H" level in this state. Accordingly, the first NOR circuit 391 of the secondary logic circuit 39 is inputted with the Q output signal w of the flip-flop 343 and the Q output signal o of the latch circuit 7, which are both at "H" level. Therefore, output signal r takes the "L" level. Further, the second NOR circuit 392 is inputted with the Q output signal v of the flip-flop 343 and the Q output signal p of the latch circuit 7, which are both at "L" level. Therefore, the output signal q takes the "H" level.
The output signal r at "L" level from the first NOR circuit 391 is transmitted to each of the preset terminals(PR) of the flip-flops 331, 332, 333. Further, the output signal q at "H" level from the second NOR circuit 392 is transmitted to each of the clear terminals(CL) of the flip-flops 331, 332, 333. Accordingly, since the signal "H" is inputted to the clear terminal(CL) of the presettable up/down counter 33, the counter is forcedly reset. Therefore, all of the Q output signals s, t, u from the flip-flops 331, 332, 333 are at "L" level, while all of the Q output signals are at "H" level.
The primary logic circuit 341 in the primary logic circuit 34 inputted with the Q output signal("H") of the flip-flop 331 and the Q output signal("H") of the fripflop 332 outputs a signal at "H" level if at least one of the Q output signals s, t, u of the flip-flops 331, 332, 333 is at "L" level. Accordingly, it outputs a signal at "H" level in the state not receiving the pulse light. In the same manner, the secondary logic circuit 342 outputs a signal at "L" level. As a result, the Q output signal v keeps "L" level while the Q output signal w keeps "H" level in the flip-flop 343. Both of the output signals are transmitted to the detection output circuit 8 (refer to FIG. 9). Then, the detection output circuit 8 externally transmits the detection output signal indicating that the photoelectronic switch receives no pulse light.
Then, the operation of the photoelectronic switch in the case where successive pulse light is received at the photoreceiving element 4 (refer to FIG. 9) will be explained as the second case also referring to FIGS. 10 and 11.
The light emitting element 4 (refer to FIG. 9) is driven by the light emitting element drive circuit 3 such that it emits pulse light when the oscillation pulses a of the pulse oscillator 1 are at "L" level. The photoreceiving element 4 receiving the pulse light outputs the photoreception signal c. The photo-reception signal c is transmitted to the waveform shaping circuit 60 and waveform-shaped into pulse signals n.
The pulse signals n are inputted to the terminal of the latch circuit 7. While on the other hand, the oscillation pulses a of the pulse oscillator 1 are inputted to the CP terminal of the latch circuit 7. Upon rising of the oscillation pulses a, since the pulse signals n are at "L" level, the latch circuit 7 outputs the signal o at "L" levlel to the Q terminal and the signal p at "H" level to the Q terminal respectively. As a result, since the second NOR circuit 392 inputted with the Q output signal p of the latch circuit 7 outputs the signal q at "L" level because one of them is at "L" level while the other of them is at "H" level. Upon receiving the signal q at "L" level, the presettable up/down counter 33 is released from the reset state.
The counter 33 released from the reset state starts counting for the oscillation pulses a in synchronization with the oscillation pulses a of the pulse oscillator 1. Accordingly, the Q output signal s of the flip-flop 331 rises from "L" to "H" level. Correspondingly, the output signal from the second logic circuit 342 of the primary logic circuit 34 turnes from "L" to "H" level. At this instance, since the output signal of the first logic circuit 341 is still kept at the state "H", the output signal v(W) of the flip-flop 343 does not turn. As described above, since the Q output signal v(W) of the flip-flop 343 is fed back to the presettable up/down counter 33, the Q output signal v of the flip-flop 343 is at "L" level and, accordingly, the counter 33 functions as an upcounter.
In the course of continuous receiving of the pulse light at the photoreceiving element 4, the counter 33 counts the oscillation pulses a from the pulse oscillator 1. Then, at the instance the seventh shot of oscillation pulses a is inputted to the counter 33, all of the Q output signals s, t, u of the flip-flops 331, 332, 333 are at "H" level. Accordingly, the output signal of the first logic circuit 341 turnes from "H" to "L" level. As described above, since the output signal of the second logic circuit 342 is at "H" level, the output signal of the flip-flop 343 turnes correspondingly to render the Q output signal v to "H" and the Q output signal w to "L". Upon receiving the Q output signal v, the detection output circuit 8 externally transmits the detection output signal indicating that the photoelectronic switch has received the pulse light.
Further, at the instance the output signal v of the flip-flop 343 turns, the output signal r of the first NOR circuit 391 turns from "L" to "H" level. Since the signal r at "H" level is inputted to each of the preset terminals (PR) of the flip-flops 331, 332, 333. The presettable up/down counter 33 is forcedly preset. As a result, the Q output signals s, t, u of the flip-flops 331, 332, 333 maintain the "H" level irrespective of the input of the oscillation pulses a from the pulse oscillator 1, hereinafter. Further, since the output signal v(w) of the flip-flop 343 turns, the counter 33 changes from the up counter to the down counter.
Then, the operation of the photoelectronic switch in the case where the photoreceiving element 4 that has so far received the pulse light continuously no more receives the pulse light continuously will be explained referring to FIGS. 10 and 12 as the third case.
When the pulse light is no more received continuously at the photoreceiving element 4, the output signal n of the waveform shaping circuit 60 is kept to "H" level. Accordingly, the Q output signal o turnes to "H" level and the Q output signal p turns to "L" level in the latch circuit 7. As a result, since one of the inputs for the first NOR circuit 391 turns to "H" level, the output signal r goes to "L" level. The presettable up/down counter 33 is released from the preset state by the signal r at "L" level.
At this instance, since the output signal v of the flip-flop 343 is at "H" level, the counter 33 has already been switched to the down counter. Therefore, the counter 33 starts downward counting in synchronization with the inputted oscillation pulses a. Simultaneously with the starting, the Q output signal s turns to "L" level while
The Q output signal turns to "H" level in the flip-flop 331. Although the first logic circuit 341 outputs a signal at "H" level by the Q output signal, since the output signal of the second logic circuit 342 does not change, the output signal v(w) of the flip-flop 343 does not invert.
During the state where the photoreceiving element 4 does not receive the pulse light, the counter 33 continues downward counting. However, at the instance the seventh shot of oscillation pulses is inputted from the pulse oscillator 1, the Q output signal s of the flip-flop turns to "L" level, and all of the output signals s, t, u of the flip-flops 331, 332, 333 turn to "L" level. As a result, the output signal of the second logic circuit 342 turns to "L" level and the output signals v(w) of the flip-flop 343 inverted. Upon receiving the signal at "L" level of the output signal v, the detection output circuit 8 externally transmits the output signal indicating that the detection output circuit 8 does not receive the pulse light.
Further, the output signal q of the second NOR circuit 392 turns to "H" level by the signal at "L" level of the output signal v. Accordingly, the counter 33 is forcedly reset. Furthermore, the counter 33 is switched to the up counter by the signal at "L" of the output signal v of the flip-flop 343.
In the three cases described above, the photoelectronic switch operates in the state quite free from the effects of the external disturbances. Explanation will then be made to the operation in the case where the photoelectronic switch suffers from the effects of the external disturbances. At first, explanation will be made to the case where the photoreceiving element 4 undergoes the effects of the external disturbances during continuous reception of the pulse light and elimination is resulted to a portion of the photo-reception signal c while referring to FIGS. 10 and 13.
As described above, in the state where the photo-receiving element 4 receives the pulse light, the Q output signal v is at "H" level while the Q output signal w is at "L" level in the flip-flop 343. Further, all of the output signals s, t, u of the respective flip-flops 331, 332, 333 for the counter 33 are at "H" level and, further, the output signal r of the first NOR circuit 391 is at "H" level, while the output signal q of the second NOR circuit 392 is at "L" level. Then, since the Q output signal v of the flip-flop 343 is at "H" level, the counter 33 is a down counter.
If elimination is resulted to the pulse light received so far, the output signal n of the waveform shaping circuit 60 at that portion maintains "H" level as shown in FIG. 13. Accordingly, the Q output signal o turns to "H" level, while the Q output signal p turns to "L" level in the latch circuit 7 of this portion. As a result, since the output signal r of the first NOR circuit 391 turns to "L" level, the counter 33 is released from the preset state. Upon releasing the preset, the counter 33 starts downward counting.
During the period in which the pulse light is eliminated, the counter 33 continues downward counting in synchronization with the oscillation pulses a. In this case, if at least one shot of pulse light is receives by the photoreceiving element 4 till the counter 33 counts the seventh oscillation pulses a, the output signals o, p of the latch circuit 7 are inverted. As a result, the output signal r of the first NOR circuit 391 turns to "H" level and the counter 33 is preset forcedly. Accordingly all of the Q output signals s, t, u of the flip-flops 331, 332, 333 are at "H" level to recover the state of continuously receiving the pulse light. Therefore, if the pulse light is eliminated due to the effects of the external disturbances, the counter 33 are preset forcedly to be free from the effects of the external disturbances unless seven or more pulse light are continuously eliminated.
Then, explanation will be made to the case where the photoreceiving element 4 does not receive the pulse light and external disturbing pulses are superimposed on the photo-reception signal of the photoreceiving element 4 due to the effects of the external disturbances while referring to FIGS. 10 and 14.
In the case where no pulse light is received, the Q output signal v is kept to "L" level, while the Q output signal w is kept to "H" level in the flip-flop 343. All of the Q output signals s, t, u for the respective flip-flops 331, 332, 333 of the counter 33 are at "L" level. Further, the output signal r of the first NOR circuit 391 is at "L", while the output signal q of the second NOR circuit 392 is at "H" level. The counter 33 functions as an upcounter by the signal at "L" level of the Q output signal v of the flip-flop 343.
Now assuming in this state that the photoreceiving element 4 receives the light of external disturbing pulses c' as shown at c' in FIG. 14, the external disturbing pulses c' are waveform-shaped into external disturbing pulse signals n'. The signals n' are transmitted to the latch circuit 7 and the latch circuit 7 inverts its output signal o, p. Therefore, the output signal q of the second NOR circuit 392 turns to "L" to release the reset state of the counter 33.
The counter 33 starts the upward counting for the oscillation pulses a. If the number of the continuously inputted external disturbing pulses c' is less than 7 in this case, the photoelectronic switch conducts the following operations.
That is, since the output signal n' of the waveform shaping circuit 60 maintains "H" level after receiving the light of the final external disturbing pulse c', the output signals o, p of the latch circuit 7 are inverted. Therefore, the output signal q of the second NOR circuit 392 turnes from "L" to "H" level. As a result the counter 33 is forcedly reset. Accordingly, the counter 33 is forcedly reset and is free from the effects of the external disturbances unless external disturbing pulses c' are received by more than 7 continuously.
As has been described above, when 7 or more pulse light are continuously received, the photoelectronic switch in this prior invention turns the Q output signal v of the flip-flop 343 to "H" level to output a detection signal indicating that the photoreceiving element 4 receives the light. While on the other hand, if 7 or more pulse light is continuously eliminated, it turns the output signal v of the flip-flop 343 to "L" level and outputs a detection signal indicating that the photoreceiving element 4 does not receive the light. Actually, it seldom occurs that 7 or more pulse light are eliminated continuously due to the effect of the external disturbances, or 7 or more of external disturbing pulse light are received continuously. Accordingly, there are no substantial effects of external disturbances.
However, the photoelectronic switch as described above involve the problems as described below.
That is, the photoelectronic switch can overcome the problems in the prior art of increasing the number of parts and the corresponding increase in the cost upon making the circuit components smaller and, particularly, attaining the integrated circuit for the photoelectronic switch, as well as the loss of the advantages for attaining the integrated circuit caused by the increased area of the integrated circuit itself, to some extent without reducing the functions at all. However, there is still present a problem that a number of parts are required for constituting the circuit.